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A COMBINED INPUT AND OUTPUT QUEUED PACKET-SWITCHED SYSTEM BASED ON PRIZMA SWITCH-ON-A-CHIP TECHNOLOGY - The authors propose a packet-switched system architecture based on the combination of a single-chip output-buffered switch element and input queues that sort arriving packets on a per-output-port basis. Scheduling is performed in a distributed two-stage approach. Independent arbiters at each of the inputs resolve input contention, whereas the output-buffered switch element resolves output contention./
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| No. | 권호·제본정보 보기 | 소장처 | 소장사항 | 청구기호 | 구독 | 최근입수호 |
|---|---|---|---|---|---|---|
| 1 | 중앙도서관/3층 연속간행물(보존)/ | 621.3805 I22l | 구독중단 | Vol.38 No.12 | ||
| 2 | 중앙도서관/3층 연속간행물실/ | 621.3805 I22l | 구독중단 |
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